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 author       = {Andrew Bailey and George A. McCaskill and George J. Milne},
 year         = {1994},
 title        = {An exercise in the automatic verification of asynchronous designs},
 journal      = {Formal Methods in System Design},
 volume       = {4},
 number       = {3},
 pages        = {213--242},
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 author       = {Edith Beign\'e and Fabien Clermidy and Pascal Vivet and Alain Clouard and Marc Renaudin},
 year         = {2005},
 title        = {An Asynchronous {NoC} Architecture Providing Low Latency Service and Its Multi-Level Design Framework},
 booktitle    = {Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems ASYNC'05 (New York, USA)},
 publisher    = {IEEE Computer Society Press},
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 title        = {BISIMULATOR: A Modular Tool for On-the-Fly Equivalence Checking},
 editor       = {Nicolas Halbwachs and Lenore Zuck},
 booktitle    = {Proceedings of the 11th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS'05), Edinburgh, Scotland, UK},
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 publisher    = {Springer Verlag},
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 year         = {2018},
 title        = {{Model-checking Synthesizable SystemVerilog Descriptions of Asynchronous Circuits}},
 editor       = {Milos Krstic and Ian W. Jones},
 booktitle    = {Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'18), Vienna, Austria},
 publisher    = {IEEE},
 pages        = {34--42},
 doi          = {10.1109/ASYNC.2018.00021},
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 title        = {{A Theory of Communicating Sequential Processes}},
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 title        = {{The Concurrency Workbench}},
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 publisher    = {Springer Verlag},
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 author       = {Hubert Garavel and Fr\'ed\'eric Lang},
 year         = {2001},
 title        = {{SVL: a Scripting Language for Compositional Verification}},
 editor       = {Myungchul Kim and Byoungmoon Chin and Sungwon Kang and Danhyung Lee},
 booktitle    = {Proceedings of the 21st IFIP WG 6.1 International Conference on Formal Techniques for Networked and Distributed Systems (FORTE'01), Cheju Island, Korea},
 publisher    = {Kluwer Academic Publishers},
 pages        = {377--392},
 url          = {http://cadp.inria.fr/publications/Garavel-Lang-01.html},
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@article(Garavel-Lang-Mateescu-Serwe-13,
 author       = {Hubert Garavel and Fr\'ed\'eric Lang and Radu Mateescu and Wendelin Serwe},
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 title        = {{CADP 2011: A Toolbox for the Construction and Analysis of Distributed Processes}},
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@inproceedings(Garavel-Lang-Serwe-17,
 author       = {Hubert Garavel and Fr\'ed\'eric Lang and Wendelin Serwe},
 year         = {2017},
 title        = {{From LOTOS to LNT}},
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 booktitle    = {ModelEd, TestEd, TrustEd -- Essays Dedicated to Ed Brinksma on the Occasion of His 60th Birthday},
 series       = {Lecture Notes in Computer Science},
 volume       = {10500},
 publisher    = {Springer Verlag},
 pages        = {3--26},
 doi          = {10.1007/978-3-319-68270-9_1},
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@inproceedings(Garavel-Serwe-17,
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 year         = {2017},
 title        = {{The Unheralded Value of the Multiway Rendezvous: Illustration with the Production Cell Benchmark}},
 editor       = {Holger Hermanns and Peter H\"{o}fner},
 booktitle    = {Proceedings of the 2nd Workshop on Models for Formal Analysis of Real Systems (MARS'17), Uppsala, Sweden},
 series       = {Electronic Proceedings in Computer Science},
 volume       = {244},
 pages        = {230--270},
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)
@book(Hoare-85,
 author       = {C. A. R. Hoare},
 year         = {1985},
 title        = {{Communicating Sequential Processes}},
 publisher    = {Prentice-Hall},
 url          = {http://usingcsp.com/cspbook.pdf},
)
@inproceedings(Jia-Li-He-17,
 author       = {Tingting Jia and Caihong Li and Anping He},
 year         = {2017},
 title        = {{Modeling and Verification of Circuit with Stable-Event}},
 booktitle    = {Proceedings of the 2017 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery (CyberC), Nanjing, China},
 publisher    = {IEEE},
 pages        = {471--475},
 doi          = {10.1109/CyberC.2017.73},
)
@article(Josephs-92,
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 year         = {1992},
 title        = {{Receptive Process Theory}},
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 volume       = {29},
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 doi          = {10.1007/BF01178564},
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@inproceedings(Josephs-07,
 author       = {Mark B. Josephs},
 year         = {2007},
 title        = {{Gate-level Modelling and Verification of Asynchronous Circuits using CSPM and FDR}},
 booktitle    = {Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07), Berkeley, California, USA},
 publisher    = {IEEE},
 pages        = {83--94},
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 author       = {Hemangee K. Kapoor and Mark B. Josephs},
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 title        = {{Modelling and Verification of Delay-Insensitive Circuits using CCS and the Concurrency Workbench}},
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 year         = {2005},
 title        = {{EXP.OPEN 2.0: A Flexible Tool Integrating Partial Order, Compositional, and On-the-fly Verification Methods}},
 editor       = {Judi Romijn and Graeme Smith and {van de Pol}, Jaco},
 booktitle    = {Proceedings of the 5th International Conference on Integrated Formal Methods (IFM'05), Eindhoven, The Netherlands},
 series       = {Lecture Notes in Computer Science},
 volume       = {3771},
 publisher    = {Springer Verlag},
 pages        = {70--88},
 doi          = {10.1007/11589976\_6},
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 author       = {Alain J. Martin},
 year         = {1986},
 title        = {{Compiling Communicating Processes into Delay-Insensitive VLSI Circuits}},
 journal      = {Distributed Computing},
 volume       = {1},
 number       = {4},
 pages        = {226--234},
 doi          = {10.1007/BF01660034},
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@techreport(Martin-14,
 author       = {Alain J. Martin},
 year         = {2014},
 title        = {{25 Years Ago: The First Asynchronous Microprocessor}},
 type         = {Computer Science Technical Reports},
 number       = {2014.001},
 institution  = {California Institute of Technology, Pasadena, California, USA},
 url          = {https://resolver.caltech.edu/CaltechAUTHORS:20140206-111915844},
)
@techreport(Muller-55,
 author       = {David E. Muller},
 year         = {1955},
 title        = {{Theory of Asynchronous Circuits}},
 type         = {Research report},
 number       = {66},
 institution  = {University of Illinois at Urbana-Champaign, Department of Computer Science},
 url          = {https://archive.org/details/theoryofasynchro66mull},
)
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 author       = {Luis A. Plana and P. A. Riocreux and W. J. Bainbridge and Andrew Bardsley and Steve Temple and Jim D. Garside and Z. C. Yu},
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 title        = {{SPA -- a secure Amulet core for smartcard applications}},
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 volume       = {27},
 number       = {9},
 pages        = {431--446},
 doi          = {10.1016/S0141-9331(03)00093-0},
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@techreport(INPI-FR-3054344,
 author       = {Marc Renaudin and Bertrand Folco and Boulahia Boubkar},
 year         = {2018},
 title        = {{Circuit int\'egr\'e prot\'eg\'e}},
 type         = {Brevet d'invention 16~57129},
 number       = {3~054~344},
 institution  = {Institut National de la Propri\'et\'e Industrielle},
)
@techreport(EPO-EP-3276656-B1,
 author       = {Marc Renaudin and Bertrand Folco and Boulahia Boubkar},
 year         = {2019},
 title        = {{Circuit int\'egr\'e prot\'eg\'e}},
 type         = {Fascicule de Brevet Europeen},
 number       = {EP~3~276~656~B1},
 institution  = {European Patent Office},
)
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 author       = {A. W. Roscoe and {C. A. R.} Hoare and Richard Bird},
 year         = {1997},
 title        = {{The Theory and Practice of Concurrency}},
 publisher    = {Prentice Hall},
 url          = {https://archive.org/details/theorypracticeof00rosc},
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 author       = {Ken Stevens and John Aldwinckle and Graham Birtwistle and Ying Liu},
 year         = {1993},
 title        = {Designing Parallel Specifications in {CCS}},
 booktitle    = {Proceedings of the Canadian Conference on Electrical and Computer Engineering},
 pages        = {983--986},
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@inproceedings(Verhoeff-98,
 author       = {Tom Verhoeff},
 year         = {1998},
 title        = {{Analyzing Specifications for Delay-Insensitive Circuits}},
 booktitle    = {Proceedings of the Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC'98), San Diego, California, USA},
 publisher    = {IEEE},
 pages        = {172--183},
 doi          = {10.1109/ASYNC.1998.666503},
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@inproceedings(Wang-Kwiatkowska-et-al-06,
 author       = {X. Wang and M. Kwiatkowska and G. Theodoropoulos and Q. Zhang},
 year         = {2006},
 title        = {Opportunities and Challenges in Process-Algebraic Verification of Asynchronous Circuit Designs},
 booktitle    = {Proceedings of the Second Workshop on Globally Asynchronous Locally Synchronous Design (FMGALS'05)},
 series       = {Electronic Notes in Theoretical Computer Science},
 volume       = {146},
 pages        = {189--206},
 doi          = {10.1016/j.entcs.2005.05.042},
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@article(Wang-Kwiatkowska-07,
 author       = {Xu Wang and Marta Z. Kwiatkowska},
 year         = {2007},
 title        = {{On Process-algebraic Verification of Asynchronous Circuits}},
 journal      = {Fundamenta Informaticae},
 volume       = {80},
 number       = {1--3},
 pages        = {283--310},
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